CUPC/8: Testing the memory board - MCU

My Farnell order arrived with the XMEGA MCUs and I picked up a couple of USBASP programmers off eBay. I needed two; one to use a a hacked-up PDI programmer (instructions here and 3V3 conversion here if necessary) and the other to flash the PDI-supporting firmware to the first programmer.

I wrote some initial code to test out the MCU's connection to the RAM module. It turns out that there is a board issue (impossible to spot from the schematic) where I mistakenly had connected pins 12 and 13 of the XMEGA both to A10 of the memory chip, leaving A11 totally unconnected. Not wanting to loose a bit off the address bus (and limit myself to 32k) or reprint the boards, I sliced the track between pins 12 & 13. This landed up leaving pin 12 not connected and pin 13 connected to A10. I jumpered pin 12 to A11. As A10 and A11 are now switched, I need to compensate for this with a dirty code hack in the XMEGA ram_write() fcn to make sure the addressing works correctly.

addr = (addr & 0xf3ff) | (addr & 0x0800) >> 1 | (addr & 0x0400) << 1;  

Problematic MCU pins 12, 13 connected to A10

In order to test the setup, I wrote a pattern to the internal XMEGA flash which is loaded into RAM on power-on. The MicroPython test script has been extended to check this pattern. Test passed.

I currently have no EEPROM on the board. The XMEGA has 2KB of internal flash memory which I can use for some test code. It's also more than enough for a bootloader if I decide to load the OS off external storage. I could in the future allow the CPU to access the XMEGA and hence the EEPROM and/or external flash through some sort of MEMIO interface but this is not currently planned.